Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design
Cheng Liu, Xiaowei Li, Guihai Yan, et al.
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Naturwissenschaften, Medizin, Informatik, Technik / Hardware
Beschreibung
This book is the outcome of extensive fault-tolerant computing research pursued at the State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences over the past decade. The proposed built-in on-chip fault-tolerant computing paradigm has been verified in a broad range of scenarios, from small processors in satellite computers to large processors in HPCs. Hopefully, it will provide an alternative yet effective solution to the growing reliability challenges for large-scale VLSI designs.
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Self-test, Self-diagnosis, and Self-repair, Fault-tolerant Deep Learning Accelerators, Built-in Fault-tolerance, Fault-tolerant Network-on-Chip, On-chip Fault-tolerance, Fault-tolerant Computing Paradigm, Fault-tolerant Multi-core Processors