Spacer Engineered FinFET Architectures

High-Performance Digital Circuit Applications

Brajesh Kumar (Indian Institute of Technology Roorkee, Uttareakhand, India) Kaushik, Pankaj Kumar (Indian Institute of Technology-Roorkee, India) Pal, Sudeb Dasgupta, et al.

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CRC Press img Link Publisher

Naturwissenschaften, Medizin, Informatik, Technik / Technik

Beschreibung

This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

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