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SoC Physical Design

A Comprehensive Guide

Veena S. Chakravarthi, Shivananda R. Koteshwar

PDF
ca. 90,94
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Springer International Publishing img Link Publisher

Naturwissenschaften, Medizin, Informatik, Technik / Elektronik, Elektrotechnik, Nachrichtentechnik

Beschreibung

SoC Physical Design is a comprehensive practical guide for VLSI designers that thoroughly examines and explains the practical physical design flow of system on chip (SoC). The book covers the rationale behind making design decisions on power, performance, and area (PPA) goals for SoC and explains the required design environment algorithms, design flows, constraints, handoff procedures, and design infrastructure requirements in achieving them. The book reveals challenges likely to be faced at each design process and ways to address them in practical design environments. Advanced topics on 3D ICs, EDA trends, and SOC trends are discussed in later chapters. Coverage also includes advanced physical design techniques followed for deep submicron SOC designs. The book provides aspiring VLSI designers, practicing design engineers, and electrical engineering students with a solid background on the complex physical design requirements of SoCs which are required to contribute effectively in design roles.

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Schlagwörter

VLSI Physical Design, Clock Tree Synthesis, System on Chip, Tape Out, Unified Power Format (UPF) Flow, SOC Design, Standard Cell Library, Analog Chip Design, Fabless Manufacturing, Microchips, VLSI Floor Plan and Placement