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Logic Synthesis for FPGA-Based Finite State Machines

Alexander Barkalov, Larysa Titarenko, Grzegorz Bazydlo, et al.

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Springer International Publishing img Link Publisher

Naturwissenschaften, Medizin, Informatik, Technik / Elektronik, Elektrotechnik, Nachrichtentechnik

Beschreibung

This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.

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Schlagwörter

Structural Decomposition, Look-up Table Element, Graph-scheme of Algorithms, Logic Synthesis, Finite State Machine, Field-programmable Gate Arrays, Embedded Memory Block